Double patterning processes are used in the semiconductor industry to practically double the photolithographic resolution for a dense line/spacing patterning. FIG. 1 illustrates an example of such a prior art double patterning process used in the semiconductor industry to produce a densely patterned structure. The prior art process involves: 1) providing a structure 101 having a substrate 110, a silicon (Si) layer 120, and a hard mask (HM) layer 130; 2) performing a first lithography operation to form a first resist pattern 140 on the HM layer 130; 3) performing a first pattern transfer operation (e.g., a reactive ion etching (RIE)) to form a HM 132 by removing a portion of the HM material not covered by the first resist pattern 140; 4) performing a second lithography operation to form a second resist pattern 150 on the Si layer 120; and 5) performing a second pattern transfer operation (e.g., RIE) to form a patterned silicon 109.
In the hard drive or, more particularly, thin film read-write heads (TFH) industry, such a double patterning process can be used to form a perpendicular magnetic recording (PMR) write head having a zero chisel angle nose shape with no nose corner rounding. FIG. 2 illustrates a prior art double patterning process used in the TFH industry to provide a patterned Ru hard mask 232 before performing an ion etching operation (e.g., RIE) to form a pole trench in an alumina layer 220. Sub-FIGS. 1a, 2a, 3a, 4a, 5a, and 6a on the bottom row provide side views of various intermediate and final structures at different points of the prior art double patterning process, while sub-FIGS. 1b, 2b, 3b, 4b,5b, and 6b on the top row provide top views of the various intermediate and final structures. The process involves: 1) performing a first lithography to form a first resist pattern 240 on a structure having a substrate 210, an alumina (Al2O3) layer 220, and a first HM layer 230 containing Ru; 2) depositing a second HM layer 250 containing tantalum (Ta) over the first HM layer 230 and the first resist pattern 240 and performing a side-mill operation (indicated by arrows 205) on a side of the HM layer 250 to expose a potion of the first resist pattern 240; 3) performing a lift-off operation to form an intermediate Ta HM 252; 4) performing a second lithography to form a second resist pattern 260; 5) performing an ion etching (IE) operation to form a final Ta HM pattern 254; and 6) performing an etching operation (RIE) via the final Ta HM pattern 254 to form the Ru HM 232.
These prior art double patterning processes are complex, involving two or more pattern transfer operations involving RIE or mill/lift-off steps. The complexity inherent in the prior art double patterning processes makes these approaches expensive in manufacturing, and process variations can be large from the double lithography and double pattern transfer operations.